Many techniques are employed to integrate sensors, such as accelerometers, gyros, and the like, with IC chips, such as those employed to condition and/or process the signals generated by the sensors. While monolithic integration of sensors and IC has been done in certain applications, monolithic integration is an expensive option typically requiring a sensor to be fabricated on top of an already complicated IC stack. As the complexity of ICs and sensors continues to increase, monolithic solutions become less attractive because of cost and the intimate association of the IC with the sensor limits a product portfolio's flexibility/diversity.
Board-level integration is another technique in which packaged sensor chips and packaged IC chips are placed onto a printed circuit board (PCB). At this level of integration, there is little difference between a sensor chip and an IC chip, so assembly techniques are advantageously straight forward, however a major disadvantage of board-level integration is the significant increase in size incurred through the many packaged devices. Each package typically includes an organic package substrate that has been built up to millimeters in thickness and an encapsulant increases chip lateral chip dimensions as well. Pick and place tool alignment limitations further limit the packing density of devices during PCB assembly.
Package-level integration is a third technique which falls somewhere between the monolithic and board-level integration techniques. Package-level integration generally entails bonding a plurality of chips onto a single organic package substrate. FIG. 1 is a cross-sectional illustration of an integrated package 100 including sensor chip 108 and an IC 109 affixed to an organic package substrate 120 having a core 125 with build-up layers 130, 131 in which interconnect traces 135 are embedded. For package-level integration, differences between sensor chips and IC chips become apparent. For example, while the IC 109 is often flip-chip bonded to the organic package substrate 120, the sensor chip 108 typically cannot be flip-chip bonded because the sensor chip 108, as received from a sensor supplier, has a ceramic cap 110 providing protection and hermetic sealing the sensor 105 within a cavity 207. As such, to provide electrical connections 116 between the sensor 105 and the organic package substrate 120, a through silicon via (TSV) 115 is formed through the silicon substrate 101. TSVs however, are difficult to form and therefore expensive. Another problem faced by package-level integration is that the thickness of the organic package substrate 120 is considerable so that with chips 108, 109 affixed to one side of the organic package substrate 120, the thickness T1 is on the order of 500 μm, or more. If additional devices are affixed to a second side of the organic package substrate 120, the thickness increases even more. As such, even where the integrated package 100 is bonded to a PCB (e.g., with solder bump 140), the integrated package 100 requires considerably more physical space than if monolithically integrated. Not only does this greater physical size limit the form factor of the end-user device, performance of the sensor may be reduced relative to a monolithic implementation because of the greater interconnect trace lengths between the sensor 105 and the IC chip 109.
As such, techniques for integrating sensors and IC chips and there resulting structures which overcome the aforementioned limitations of the conventional techniques are advantageous.